{
 "id": "sjhhg/fpga_verilog",
 "owner": "sjhhg",
 "name": "fpga_verilog",
 "downloads": 11,
 "likes": 0,
 "last_modified": "2025-05-07T09:03:30.000Z",
 "stated_licence": "apache-2.0",
 "stated_from": "tag",
 "licence_name": null,
 "licence_link": null,
 "file_licence": null,
 "licence_files": [],
 "sources": [],
 "gated": false,
 "tasks": [
  "question-answering"
 ],
 "citation": "<!-- If there is a paper or blog post introducing the dataset, the APA and Bibtex information for that should go in this section. -->\n\n**BibTeX:**\n\n[More Information Needed]\n\n**APA:**\n\n[More Information Needed]",
 "signal": "permissive",
 "reason": "The declared licence (apache-2.0) is classified as permissive.",
 "revision": "21ae0e91fa8f36a0ac9abcb959604b46ca9789a1",
 "stated_evidence": "https://huggingface.co/datasets/sjhhg/fpga_verilog/blob/21ae0e91fa8f36a0ac9abcb959604b46ca9789a1/README.md",
 "file_evidence": "https://huggingface.co/datasets/sjhhg/fpga_verilog/tree/21ae0e91fa8f36a0ac9abcb959604b46ca9789a1",
 "card_nc": false
}